1. Field of the Invention
The present invention is related to a liquid crystal display (LCD) that utilizes 8-domain advanced multi-domain vertical alignment (AMVA), and more particularly, to an LCD that utilizes two thin film transistors (TFTs) for a main pixel and a sub-pixel, and a switch element for controlling a charge time of the main pixel and the sub-pixel, and a related method.
2. Description of the Prior Art
Many 8-domain advanced multi-domain vertical alignment (AMVA) LCD display panels divide each pixel into two pixel elements, namely a main pixel and a sub-pixel, and drive the two pixel elements with different driving voltages to angle the two pixel elements differently, thereby forming different optical characteristics to achieve a wide viewing angle. Angling of the main pixel and the sub-pixel may be realized in a number of different ways, including capacitor/capacitor type (CC-type) pixels realized through use of capacitors, and transistor/transistor type (TT-type) pixels realized through use of thin-film transistors (TFTs). A third type, called “Com-Swing-type”, utilizes changing the common voltage Vcom of the main pixel and the sub-pixel to angle the two pixel elements differently. CC-type utilizes capacitive coupling to adjust a capacitance ratio of a capacitor between the main pixel and the sub-pixel and a liquid crystal capacitor, such that the driving voltages of the main pixel and the sub-pixel may be different. TT-type utilizes different gate signal lines or data signal lines to provide different driving voltages to the main pixel and the sub-pixel. Com-swing-type makes the voltages of the main pixel and the sub-pixel different by adjusting a Vcom electrode of storage capacitors of the main pixel and the sub-pixel. One disadvantage of CC-type is that once the capacitance of the capacitor electrically connected between the main pixel and the sub-pixel is decided, the driving voltages of the main pixel and the sub-pixel are also decided. Thus, freedom to alter the design is lost. Further, because the main pixel and the sub-pixel are electrically connected through the capacitor, the main pixel and the sub-pixel are no longer mutually independent, but are linked together, which leads to yellow/red banding. Com-swing-type faces a similar problem. Once the voltage of the Vcom electrode of the storage capacitors of the main pixel and the sub-pixel is decided, relations of the 0-255 levels of the main pixel and the sub-pixel cannot be changed, barring free adjustment of the main pixel and the sub-pixel. Likewise, the main pixel and the sub-pixel are interlinked, and not mutually independent, which leads to the yellow/red banding problem. Only TT-type utilizes different data signal lines to provide different driving voltages directly to the main pixel and the sub-pixel, or utilizes different gate signal lines to adjust charge time of the main pixel and the sub-pixel. TT-type can freely adjust the driving voltages of the main pixel and the sub-pixel, and the main pixel and the sub-pixel are mutually independent, which prevents the yellow/red banding problem, and improves color shift performance.
TT-type technology can be broadly split into two categories: 2G1D and 1G2D. The former utilizes two gate signal lines and one data signal line per pixel; the latter utilizes one gate signal line and two data signal lines per pixel. Please refer to FIG. 1 and FIG. 2. FIG. 1 is a diagram of a 2G1D pixel architecture for TT-type. FIG. 2 is a diagram of a 1G2D pixel architecture for TT-type. In FIG. 1, the (p,q)th pixel 100 of the LCD panel is split into two pixel elements: a main pixel A1 and a sub-pixel B1. The main pixel A1 has a switch element a1 having a drain electrode electrically connected to a storage capacitor Csm and a liquid crystal capacitor Clm. The sub-pixel B1 has a switch element b1 having a drain electrode electrically connected to a storage capacitor Css and a liquid crystal capacitor Cls. The pixel 100 utilizes two gate signal lines Gpm, Gps. The first gate signal line Gpm, which corresponds to the main pixel A1, is electrically connected to a gate of the switch element a1. The second gate signal line Gps, which corresponds to the sub-pixel B1, is electrically connected to a gate of the switch element b1. A data signal line Dq is commonly used by the main pixel A1 and the sub-pixel B1, and is electrically connected to source electrodes of the switch element a1 and the switch element b1, respectively. A storage capacitor line Cs is another line commonly utilized by the main pixel A1 and the sub-pixel B1. The storage capacitor line Cs is electrically connected to common electrodes of the storage capacitors Csm, Css of the main pixel A1 and the sub-pixel B1. Likewise, in FIG. 2, a (p,q)th pixel 200 of the LCD panel is also divided into a main pixel A2 and a sub-pixel B2. The main pixel A2 has a switch element a2; the sub-pixel B2 has a switch element b2. Drain electrodes of the switch element a2 and the switch element b2 are likewise electrically connected to storage capacitors Csm, Css and liquid crystal capacitors Clm, Cls, respectively. In FIG. 2, a data signal line Dqm corresponding to the main pixel A2 is electrically connected to a source electrode of the switch element a2, and a data signal line Dqs corresponding to the sub-pixel B2 is electrically connected to a source electrode of the switch element b2. A gate signal line Gp commonly utilized by the main pixel A2 and the sub-pixel B2 is electrically connected to gate electrodes of the switch element a2 and the switch element b2.
It can be seen from FIG. 1 and FIG. 2 that, regardless of which connection topology (2G1D or 1G2D) is employed, the number of lines utilized in the LCD panel is increased twofold over the original connection scheme. 2G1D requires twice as many gate signal lines, the number of pins for a driving IC must also increase twofold, and the number of scanlines also doubles. Scan time for each pixel is cut in half, which leads to a problem of insufficient charging time for pixel data. Likewise, 2D1G requires twice as many data signal lines, and the number of pins for a driving IC is doubled, which causes increases in manufacturing cost of the LCD panel. Thus, one major field of research in LCD display design involves how to overcome the above-mentioned problems through design of an 8-domain AMVA LCD panel.